In the maintenance of the board and servo module of CNC machine tool system, the damage of PAL devices sometimes leads to the scrapping of the whole board and even the system. Because they are often encrypted, even if these chips are not damaged, we cannot read the fuse diagram file, and then copy and replace them.
When the chip is in good condition, the logic analyzer can be used to analyze its logic function online, or build a simple circuit to test its input-output relationship, but once the chip is damaged, it is often helpless. In this paper, we introduce a method to solve the problem thoroughly.
The chip played the role of chip selection in the spindle servo module of Kollmorgen VFS5. On one occasion the module failed, the logic analyzer observed that an external program memory chip was not selected when the CPU was about to access it. And other states in the circuit all together judged that the PLD chip was not functioning or damaged. Duplicated and replaced the chip in the following way due to no spare parts.
2 Get the chip circuit image
First, put the chip into the dissolving agent to heat and remove the package, and then got a wafer of 2 or 3 square millimeter. And cleaned the surface using alcohol cotton.
The wafer was observed under a microscope with a power of more than 500, the fuse layer was most clear by focusing. The screenshots which show the details partly were saved, and the complete internal circuit image was assembled by image processing software (Fig. 1).
Fig. 1 A complete image of 6×5 screenshots of this example
3 Read logic function data
Read out the data in the data area carefully and arranged them according to the corresponding row and column addresses (Fig. 2). The data was “1” when fused, and “0” intact. This example has 2048 fuse data.
Fig. 2 Data mapping in this example
4 Get the logic function expression
According to the circuit diagram described in TI’s TIBPAL16L8-25CN datasheet (Fig. 3), the input and output logic expressions can be written out:
Fig. 3 TIBPAL16L8-25CN logic circuit diagram
Among them, I1-I11 represent 1-11 pins and P12-P19 represent 12-19 pins respectively. Obviously, P15 (I/O) was set as input, while other I/O pins were set as output. The “\” in front of the signal name indicates the logical NOT signal of it, the concatenation of the signal name indicates the logical AND, and the “+” indicates the logical OR.
5 Generate fuse diagram file
Using PLD design software could generate fuse diagram file and ABEL 4.0 was used in this example, the source file was as follows:
U90 device ‘P16L8’;
I1,I2,I3,I4,I5,I6,I7,I8,I9,I11 pin 1,2,3,4,5,6,7,8,9,11;
P12,P13,P14,P15,P16,P17,P18,P19 pin 12,13,14,15,16,17,18,19;
!P19 = I1&I2&I3&I4&!I6&I7&!I8&I9&!I11&!P15;
!P18 = I1&!P15;
!P17 = I1&I2&I3&I4&!I6&!P15&(!I7&I8#!I5&I8&I9#!I5&!I7);
!P16 = I1&I2&I3&I4&!I6&!I7&!P15&(I8&I9#!I11);
!P14 = I1&!P15&(!I4#!I3#I6#!I2);
!P13 = P15#!I1;
!P12 = I1&!P15;
The compiled fuse diagram file was as follows:
□ABEL 4.00 Data I/O Corp. JEDEC file for: P16L8 V9.0
Created on: Thu Sep 1 11:16:14 19;6
QP20* QF2048* QV0* F0*
NOTE Table of pin names and numbers*
NOTE PINS I1:1 I2:2 I3:3 I4:4
I5:5 I6:6 I7:7 I8:8 I9:9 I11:11
NOTE PINS P13:13 P14:14 P15:15 P16:16 P17:17 P18:18 P19:19*
6 Duplicate or replace
By using the programmer wrote the fuse diagram file into a TIBPAL16L8-25CN blank chip, thus the duplicate was completed. And other compatible chips could also be selected for replacement. This example used the duplicated chip to make the spindle servo module return to normal.